This invention relates to a frequency-voltage conversion circuit and a receiving apparatus applicable for a direct conversion receiver which receives and demodulates a FSK Frequency Shift Keying) signal.
A superheterodyne method and a direct conversion method are generally used in a FSK (Frequency Shift Keying) receiver. In each method, demodulation is carried out by the use of the known F-V (Frequency-Voltage) conversion.
Referring to FIG. 1, description will be made about a related direct conversion receiver using the F-V conversion.
In a Weber receiver illustrated in FIG. 1 the direct conversion receiver, a base-band cross signal is brought up to intermediate frequency (namely, up-conversion is conducted), and the F-V conversion is performed.
The FSK signal sent from a receiver (not shown) is received by an antenna 101, is amplified by a high frequency amplifier 102, and is given to mixers 103 and 104, respectively.
A local oscillator 107 produces an oscillation signal. The oscillation signal is shifted with xcfx80/2 by the use of a xcfx80/2 shifter 105, and is given to the mixer 103. Further, the frequency signal from the local oscillator 107 is directly given to the mixer 104.
Low pass filters (hereinafter, abbreviated as LPFs) 106 and 108 are connected to the mixers 103 and 104, respectively. In this condition, output signals from the mixers 103 and 104 are given to the LPSs 106 and 108, respectively.
Each of the LPFs 106 and 108 has passing band equivalent to the base band signal, and realizes or obtains selectivity between adjacent channels. Further, the LPFs 106 and 108 supply output signals corresponding to signals from the mixers 103 and 104 into an up-conversion portion 130.
In this case, the up-conversion portion 130 is composed of mixers 109 and 110, a local oscillator 113, a xcfx80/2 shifter, and an adder 112, as illustrated in FIG. 1.
With this structure, the mixer 109 is given with an oscillation signal from the local oscillator 113. Further, the oscillation signal from the local oscillator 113 is shifted with xcfx80/2 by a xcfx80/2 shifter 111, and is given to the mixer 110.
Signals multiplied by the mixers 109 and 110 are added by the adder 112 Alternatively, the multiplied signals may be subtracted by a subtracter (not shown). An output signal of the adder 112 is converted by the use of a delay detection portion 114.
In the above-mentioned Weber receiver 131, a carrier wave frequency of the received FSK signal is defined as xcfx89/2 xcfx80 while frequency deviation is defined as xc2x1xcex94xcfx89/2 xcfx80. In this condition, the received FSK signal SrFSK is represented by the following equation.
SrFSK=cos(xcfx89xc2x1xcex94xcfx89)t 
In this event, when the output signal SOSC1 of the local oscillator 107 is defined as SOSC1=sin xcfx89t, the output signals SMIX3 and SMIX4 of the mixers 103 and 104 are represented by the following equations, respectively.
SMIX3=cos(xcfx89xc2x1xcex94xcfx89)txc2x7cos xcfx89t =xc2xd{cos(xcfx89xc2x1xcex94xcfx89+xcfx89)t+cos(xcfx89xc2x1xcex94xcfx89xc2x7xcfx89) t}=xc2xd{cos(2xcfx89xc2x1xcex94xcfx89)t+cos(xc2x1xcex94xcfx89t)}
SMIX4=cos(xcfx89xc2x1xcex94xcfx89)txc2x7sin xcfx89t =xc2xd{sin(xcfx89xc2x1xcex94xcfx89+xcfx89)t+sin(xcfx89xc2x1xcex94xcfx89xc2x7xcfx89)t}=xc2xd{sin(2xcfx89xc2x1xcex94xcfx89)t+sin(xc2x1xcex94xcfx89t)}
First terms of these equations are removed by the LPFs 106 and 108. Therefore, the outputs SLPF6 and SLPF8 of the LPFs 106 and 108 are represented by the following equations.
SLPF6=xc2xd{cos(xcex94xcfx89t)}xe2x80x83xe2x80x83(1) 
SLPF8=xc2x1xc2xd{sin(xcex94xcfx89t)}xe2x80x83xe2x80x83(2) 
In this case, when calculation is carried out without limiter amplifiers 128 and 129 so as to be readily understood, an output signal Vout of the up-conversion portion 130 is modified as follows. Herein, it is to be noted that the output signal of the local oscillator 113 is defined by SOSC2=sin xcfx892t.
Vout=xc2xd{cos(xcex94xcfx89t)sin xcfx892t)}xc2x1xc2xd{sin(xcex94xcfx89t)cos xcfx892t)}=xc2xd{sin(xcfx892xc2x1xcex94xcfx89)}xe2x80x83xe2x80x83(3) 
From the above-mentioned result, the base band signal I, Q is converted to a signal having frequency deviation of xc2x1xcex94xcfx89/2xcfx80when the intermediate frequency xcfx892/2xcfx80 is defined as a center.
Subsequently, when the limiter amplifiers 128 and 129 are inserted between the LPF 106 and the mixer 109 or between the LPF 108 and the mixer 110, the condition is explained as follows.
When inputs into the mixers 109 and 110 becomes rectangular wave by the limiter amplifiers 128 and 129, outputs SLPF6xe2x80x2 and SLPF8xe2x80x2, are modified as follows by Fourier transforming the above-mentioned equations (1) and (2) Herein, it is to be noted that constant is defined as k=2/xcfx80.
SLPF6xe2x80x2=k{cos(xcex94xcfx89t)}+⅓xc2x7cos(3xcex94xcfx89t) +⅕xc2x7cos(5xcex94xcfx89t)+. . .}xe2x80x83xe2x80x83(1xe2x80x2) 
SLPF8xe2x80x2=k{sin(xcfx892xc2x1xcfx89)t +⅓xc2x7sin(3(xcfx892xc2x1xcex94xcfx89)t +⅕xc2x7sin(5(xcfx892xc2x1xcex94xcfx89)t)+. . .}xe2x80x83xe2x80x83(2xe2x80x2) 
Namely, the output Voutxe2x80x2 of the up-conversion portion 130 is similarly considered to be the modification of the above-mentioned equation (3). Thereby, the following equation is introduced.
Vout=k{sin(xcfx892xc2x1xcfx89) t +⅓xc2x7sin(3(xcfx892xc2x1xcex94xcfx89)t +⅕xc2x7sin(5(xcfx892xc2x1xcex94xcfx89)t)+. . .}xe2x80x83xe2x80x83(3xe2x80x2) 
Consequently, it is found out that the conversion-up becomes possible even when the limiter amplifiers 128 and 129 are inserted between the LPF 106 and the mixer 109 or between the LPF 108 and the mixer 110.
Although the Weber receiver 131 has been suggested as a SSB (Single Side Band) receiver, it is found out that the Weber receiver 131 is applicable as the FSK receiver, as explained above.
The output signal of the adder 112 is given to the delay detection portion 114, and the F-V conversion is carried out in the delay detection portion 114.
In FIG. 2, a detail structure of the delay detection portion 114 is illustrated. Further, a timing chart showing change (waveform) of each signal of each portion in the delay detection portion 114 is illustrated in FIG. 3.
A signal VA from the adder 112 is converted into output signals VB and VC by removing amplitude demodulation components by the use of a limiter amplifier 119.
Subsequently, the output signals VB and VC are converted into signals VD and VE having desired slopes at rising through common-emitter transistors 121 and 221. Further, the signals VD and VE are converted into signals VF and VG by comparators 123 and 223 given with threshold level VTH26 from a reference voltage 126.
In this event, the transistors 121 and 221 are coupled to constant current sources 120, 220 and capacitors 122, 222, respectively.
Moreover, the signals VF and VG are converted into a signal VH via an AND gate (namely logical product). Thereby, pulse signal line, which has constant amplitude and constant delay time xcfx84, is formed, as illustrated in FIG. 3.
Finally, the pulse signal line VH is integrated by a LPF 125, and converted into a voltage value VI corresponding to frequency. Further, the obtained voltage VI is converted into a logic data signal consisting of xe2x80x9c1xe2x80x9d and xe2x80x9c0xe2x80x9d by a converter (not shown).
In FIG. 4, frequency spectrums are illustrated so as to explain the above-mentioned structure. In an intermediate stage in the FIG. 4, center frequency between frequency of xe2x80x9c1xe2x80x9d and frequency of xe2x80x9c0xe2x80x9d becomes carrier wave frequency.
In FIG. 5, characteristic obtained the delay detection portion 114 is illustrated. In the above-mentioned example, demodulation sensitivity KD is defined as KD=2xcfx84 V [V/Hz]. Consequently, the characteristic is affected by variation of xcfx84 and V. Herein, it is to be noted that xcfx84 represents delay time while V indicates output amplitude of the signal VH.
Moreover, the delay time xcfx84 is inversely proportional to variation of the constant current sources 120 and 220 illustrated in FIG. 2, and is proportional to variation of static capacitance of the capacitors 122 and 222. Further, the delay time xcfx84 is proportional to the threshold voltage VTH26.
Specifically, the demodulation sensitivity is fluctuated by variation of manufacturing condition. In addition, Further, F-V conversion output amplitude is varied in the direct-conversion method using the F-V conversion. As a result, receiving condition may be deteriorated.
Further, the power supply voltage is restricted from the same reason, and reneality of the F-V conversion is degraded. In consequence, receiving condition is also degraded.
It is therefore an object of this invention to provide a frequency-voltage conversion circuit which is capable of correcting manufacturing variation and change with time caused by the variation.
It is another object of this invention to provide a frequency-voltage conversion circuit which is capable of demodulating a FSK signal with stable and high sensibility and linearity.
In a frequency-voltage conversion circuit according to this invention, integrating means gives a predetermined slope for rising or falling of a rectangular pulse signal.
First comparing means compares an output value of the integrating means with a threshold value, and produces a pulse signal line having a pulse width corresponding to frequency of the rectangular pulse signal.
Storing means stores and retains the threshold value. Smoothing means smooths the pulse signal line, and produces a voltage value corresponding to the frequency of the rectangular pulse signal.
Second comparing means compares the voltage value with a reference voltage, and charges and discharges electric charge for the storing means on the basis of the comparison result.
In this case, the integrating means comprises a constant current device which produces constant current, and a static capacitance device which stores the current.
With such a structure, the second comparing means discharges the electric charge from the storing means when the voltage value is higher than the reference voltage.
On the other hand, the second comparing means charges electric charge for the storing means when the voltage value is lower than the reference voltage.